Architect Labs nabs $24M to speed up chip design projects with AI

2026-06-18 · Source: AI – SiliconANGLE · Field: Technology & Digital — Artificial Intelligence & Machine Learning, Emerging Technologies & Innovation, Robotics & Autonomous Systems · Depth: Novice, quick

Summary

Chip design startup Architect Labs Inc. launched on June 18, 2026, securing \$24 million in seed funding led by Kindred Ventures. Notable investors include Perplexity AI CEO Aravind Srinivas, Transformer co-inventor Lukasz Kaiser, and former OpenAI executive Srinivas Narayanan. The Palo Alto-based company is developing an artificial intelligence platform designed to accelerate and make more efficient the typically years-long, multi-million-dollar chip development process. Architect's platform automates manual tasks across the workflow, from generating initial RTL designs using specialized languages like Verilog to creating full GDSII chip blueprints. It also performs design verification through simulations and formal verification methods to identify errors. Architect plans to sell its software to traditional chipmakers, as well as AI model developers, robotics startups, and neocloud operators, collaborating to create workload-optimized custom silicon. The funding will support computing infrastructure acquisition and research initiatives.

Key takeaway

For Directors of AI/ML or AI Hardware Engineers evaluating custom silicon solutions, Architect Labs' \$24 million funding validates a significant shift towards AI-driven chip design. You should explore platforms that automate RTL design, GDSII blueprint generation, and verification, as these can drastically reduce development cycles and costs. This approach enables creating workload-optimized chips faster, potentially giving your organization a competitive edge in specialized AI applications.

Key insights

AI platforms can fundamentally accelerate and optimize the complex, multi-year process of semiconductor chip design.

Principles

• AI-first semiconductor design demands a first-principles process rethink.
• Avoid forcing AI into existing, unoptimized workflows.

Method

An AI platform automates chip development from high-level RTL design creation (using Verilog) to full GDSII blueprint generation and error verification via simulations and formal methods.

In practice

• Develop custom silicon optimized for specific AI workloads.
• Automate manual tasks in chip development workflows.

Topics

• Chip Design Automation
• AI Hardware
• Semiconductor Development
• Design Verification
• Custom Silicon
• Startup Funding

Best for: Investor, Entrepreneur, AI Hardware Engineer, AI Engineer, Director of AI/ML

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Editorial summary, takeaway, and curation by AIssential. Original article published by AI – SiliconANGLE.