New AI models, token minimization and IBM’s new sub-1nm chip

· Source: IBM Technology · Field: Technology & Digital — Artificial Intelligence & Machine Learning, Emerging Technologies & Innovation · Depth: Intermediate, extended

Summary

IBM has unveiled sub-1nm chip technology, featuring a 7 Angstrom nano stack architecture that vertically stacks transistors for the first time, promising 50% better performance or 70% more power savings than 2nm chips. This innovation packs nearly 100 billion transistors and offers 40% extra area scaling, driven by AI workload demands. Concurrently, new AI models like Sakana Fugu, a multi-orchestration system from Japan, and Z.ai's GLM 5.2, a large open-weights coding model from China, are emerging, challenging established frontier labs. Google DeepMind is also partnering with A24 to develop AI tools for filmmakers, aiming to integrate AI additively into creative workflows. The industry is also shifting from "token maxing" to "token mining," emphasizing efficient token consumption due to high costs, promoting local model usage and orchestration for cost-effectiveness.

Key takeaway

For AI Directors and Hardware Engineers managing compute infrastructure, the advent of sub-1nm 3D chips and advanced model orchestration necessitates a strategic re-evaluation of hardware investments and deployment strategies. Prioritize solutions that offer significant power efficiency and density, while also implementing token-efficient AI practices, including local model offloading, to manage escalating operational costs effectively.

Key insights

Semiconductor scaling is moving to 3D architectures, while AI model development emphasizes orchestration and cost-efficient token usage.

Principles

Method

IBM's nano stack vertically stacks and staggers transistors, optimizing devices independently for density. Sakana Fugu orchestrates multiple existing AI models via a router, dynamically selecting the best for a task.

In practice

Topics

Best for: Investor, CTO, VP of Engineering/Data, AI Scientist, AI Hardware Engineer, Director of AI/ML

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Editorial summary, takeaway, and curation by AIssential. Original article published by IBM Technology.