Mosaic SoC raises $3.8M pre-seed to build low-power perception chips for spatial computing

2026-04-30 · Source: Tech.eu - Tech.eu · Field: Technology & Digital — Artificial Intelligence & Machine Learning, Robotics & Autonomous Systems, Emerging Technologies & Innovation · Depth: Intermediate, short

Summary

ETH Zurich spinout Mosaic SoC has secured $3.8 million in pre-seed funding, led by Founderful with participation from Kick Foundation, to develop low-power perception chips for spatial computing. These multi-core chips are engineered to enable always-on spatial intelligence in energy-constrained devices, such as AR glasses and mobile hardware, without relying on power-hungry application processors or GPUs. The company's approach involves a dedicated perception chip that provides a baseline layer of spatial intelligence, allowing devices to understand their environment in real-time while minimizing power consumption and enabling smaller form factors. Mosaic SoC's architecture features a proprietary multi-core design with eight or more cores, differentiating it from single- or dual-core ARM-based competitors, and aims to evolve into a platform supplier with AI deployment toolchains and compilers.

Key takeaway

For Original Design Manufacturers (ODMs) building next-generation AR and mobile hardware, you should consider Mosaic SoC's dedicated perception chips to achieve real-time spatial intelligence within strict power budgets. This approach allows you to develop truly wearable form factors and continuous awareness features, like local mapping and object tracking, without compromising battery life or industrial design, potentially shifting your product development towards more integrated, energy-efficient solutions.

Key insights

Dedicated multi-core perception chips enable always-on spatial intelligence in power-constrained devices.

Principles

• Spatial intelligence needs low energy.
• Multi-core architecture boosts performance/watt.
• Hardware is a platform starting point.

Method

Mosaic SoC designs integrated circuits with proprietary multi-core architectures (eight+ cores) to process visual and positional sensor data, creating local maps and enabling real-time environmental understanding at a fraction of the energy of traditional processors.

In practice

• Integrate for always-on AR glasses.
• Use as smartphone front camera co-processor.
• Enable event-triggered recording.

Topics

• Spatial Computing
• Low-Power Perception Chips
• Multi-core SoC Architecture
• Augmented Reality Hardware
• Computer Vision

Best for: Computer Vision Engineer, AI Hardware Engineer, AI Architect, Director of AI/ML

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Editorial summary, takeaway, and curation by AIssential. Original article published by Tech.eu - Tech.eu.