Future AI chips could be built on glass

2026-03-13 · Source: MIT Technology Review · Field: Technology & Digital — Artificial Intelligence & Machine Learning, Emerging Technologies & Innovation, Semiconductor Manufacturing · Depth: Intermediate, medium

Summary

Absolics, a South Korean company, is initiating commercial production of specialized glass panels this year, intended for use as substrates in next-generation AI chips. This technology, also pursued by Intel and AMD, aims to enhance computing hardware's speed and energy efficiency by replacing traditional organic substrates. Glass offers superior thermal stability, allowing for 10 times more connections per millimeter and enabling 50% more silicon chips within the same package area, which improves computational capability and power delivery. Despite its fragility, research has overcome manufacturing challenges, with Intel demonstrating a functional device booting Windows OS on a glass core substrate in early 2025. The market for glass substrates in semiconductors is projected to grow from $1 billion in 2025 to $4.4 billion by 2036, with other major manufacturers like Samsung and LG Innotek also accelerating their efforts.

Key takeaway

For semiconductor investors evaluating future growth areas, the rapid commercialization and broad industry adoption of glass substrates signal a significant shift. Your portfolio should consider companies like Absolics, Intel, Samsung, and JNTC that are investing heavily in this technology, as the market is projected to reach $4.4 billion by 2036. This trend indicates a strong foundation for energy-efficient AI compute, making early movers potentially lucrative.

Key insights

Glass substrates offer superior thermal stability and connection density for next-generation AI chips, enhancing performance and energy efficiency.

Principles

• Thermal stability improves chip density.
• Denser connections boost computational power.
• Glass enables optical data pathways.

Method

Integrate specialized glass panels as substrates in chip packaging to connect multiple silicon chips, leveraging its thermal stability and smoothness for denser, more efficient designs.

In practice

• Design for 10x denser connections per millimeter.
• Incorporate 50% more silicon chips per package.
• Explore optical data pathways for energy savings.

Topics

• AI Chips
• Glass Substrates
• Advanced Packaging
• Semiconductor Manufacturing
• Energy Efficiency

Best for: Investor, AI Engineer, AI Architect, Research Scientist

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Editorial summary, takeaway, and curation by AIssential. Original article published by MIT Technology Review.