When Arm Meets RISC-V: SiPearl, Semidynamics to Co-Develop Sovereign AI Platform

2026-05-20 · Source: Big Data & AI News - EE Times · Field: Technology & Digital — Artificial Intelligence & Machine Learning, Cloud Computing & IT Infrastructure, Emerging Technologies & Innovation · Depth: Advanced, long

Summary

SiPearl and Semidynamics announced a partnership to co-develop a European sovereign rack-scale AI platform, aiming to reduce reliance on foreign suppliers for AI hardware. This multi-generation effort will combine SiPearl's Arm Neoverse V2-based Rhea2 CPUs for general-purpose and orchestration tasks with Semidynamics' RISC-V-based AI inference accelerators as main compute engines. The Rhea2 CPU, expected to tape out in 2027, will use DDR-type memory, simplifying coherence with accelerators. Semidynamics has already completed a 3-nm test chip for architectural validation, with a production tape-out planned for later this year. The platform will support full CPU-accelerator memory coherence, use UCIe interconnects for chiplet integration in later generations, and adhere to Open Compute Project (OCP) specifications. It targets large-scale inference workloads, including LLM serving and long-context processing, emphasizing efficiency, programmability, and low total cost of ownership, with software support for vLLM, SGL, ONNX, and PyTorch. The first-generation platform is expected this decade, after Rhea1's market introduction.

Key takeaway

For AI Architects evaluating future inference infrastructure, this European initiative offers a compelling alternative to existing proprietary stacks. You should consider the SiPearl-Semidynamics platform for its open standards, full CPU-accelerator memory coherence, and rack-scale efficiency. It targets LLM serving and long-context workloads. This approach promises reduced vendor lock-in and a potentially lower total cost of ownership for your data center deployments, especially if sovereign AI capabilities are a strategic priority.

Key insights

European firms SiPearl and Semidynamics are building a sovereign, rack-scale AI inference platform using Arm CPUs and RISC-V accelerators.

Principles

• Prioritize open standards like RISC-V, OCP, and UCIe.
• Design for full CPU-accelerator memory coherence.
• Focus on efficiency and TCO for inference workloads.

Method

Co-develop a multi-generation rack-scale AI platform, integrating Arm CPUs and RISC-V accelerators, with future chiplet-level integration via UCIe.

In practice

• Use Arm Neoverse V2 for orchestration.
• Implement RISC-V ASICs for AI inference.
• Support vLLM, PyTorch, Linux, GCC, LLVM.

Topics

• Sovereign AI
• RISC-V Accelerators
• Arm Neoverse
• Chiplet Integration
• Rack-Scale AI
• LLM Inference
• Open Compute Project

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Editorial summary, takeaway, and curation by AIssential. Original article published by Big Data & AI News - EE Times.