Should NVIDIA Worry About Huawei?
Summary
Despite strict U.S. export controls aimed at preventing China from acquiring advanced extreme ultraviolet (EUV) lithography machines, Huawei has launched new AI chips, the Ascend 910B and 910C. These chips, manufactured domestically by SMIC using older deep ultraviolet (DUV) equipment, overcome manufacturing limitations through a labor-intensive self-aligned quadruple patterning method. This process, while yielding only 30-40% of functional chips compared to TSMC's 90%, allows Huawei to produce 7nm-scale features. The Ascend 910B delivers 320 teraflops, significantly outperforming Nvidia's export-restricted H20 chip (148 teraflops) for AI model training, despite the H20's superior memory speed. Huawei compensates for individual chip limitations with its Cloud Matrix architecture, linking nearly 400 Ascend chips via optical interconnects to create a unified computational memory pool, and is investing heavily in its MindSpore software ecosystem to rival Nvidia's CUDA.
Key takeaway
For AI developers and data center operators in China, Huawei's Ascend 910B offers superior raw computational power for training new AI models compared to Nvidia's export-restricted H20. If your primary goal is AI model training and you operate within China's regulatory environment, prioritize the Ascend 910B despite its manufacturing inefficiencies, as its architectural scaling and software ecosystem development aim to bridge performance gaps and reduce reliance on Western technology.
Key insights
China's domestic semiconductor industry is achieving advanced AI chip production despite U.S. export controls, prioritizing self-sufficiency over conventional economics.
Principles
- Necessity drives innovation in restricted environments.
- Distributed architectures can compensate for individual component limitations.
Method
Huawei uses self-aligned quadruple patterning with DUV lithography to achieve 7nm features, building chips through repetitive material deposition and carving cycles to overcome EUV restrictions.
In practice
- Consider DUV multi-patterning for advanced node fabrication.
- Explore optical interconnects for large-scale AI clusters.
Topics
- AI Chip Export Controls
- Huawei Ascend Chips
- Semiconductor Manufacturing
- AI Model Training
- MindSpore Ecosystem
Best for: Machine Learning Engineer, NLP Engineer, Computer Vision Engineer, AI Engineer, AI Architect, Policy Maker
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Editorial summary, takeaway, and curation by AIssential. Original article published by Bug.