This NPU Is 5,000% Faster Than A GPU | Photonic Chips Explained

· Source: Bug · Field: Technology & Digital — Artificial Intelligence & Machine Learning, Emerging Technologies & Innovation, Cloud Computing & IT Infrastructure · Depth: Advanced, medium

Summary

Photonic MPUs are emerging as a highly energy-efficient alternative to GPUs and ASICs like Google's TPU for AI inference, particularly dense matrix multiplication. Unlike silicon chips that push electrons, photonic MPUs compute by routing and interfering light waves, generating virtually zero resistive heat and slashing calculation energy costs to roughly one femtojoule per operation. This makes the math hundreds of times more energy efficient than silicon. Qunnect recently launched the first commercial photonic MPU as a PCIe card, designed to offload specific math workloads from a CPU, working alongside a GPU. This optical chip delivers up to 30 times higher energy efficiency for certain math workloads, pulling only 150 watts. A significant challenge remains the energy drain from converting electrical signals to optical and back, which currently costs hundreds of times more power than the computation itself.

Key takeaway

For AI Architects evaluating inference hardware, consider photonic MPUs for dense matrix multiplication workloads. Your current silicon-based solutions face inherent energy limits due to resistive heat. Integrating optical cards, like Qunnect's PCIe offering, can drastically reduce power consumption for specific math tasks, achieving up to 30 times higher energy efficiency. However, be aware of the significant energy overhead from electrical-to-optical signal conversion, which remains a key challenge impacting overall system efficiency.

Key insights

Photonic MPUs offer extreme energy efficiency for AI inference by using light waves, overcoming silicon's resistive heat limitations.

Principles

Method

Photonic MPUs route and interfere light waves, with weights programmed into optical components, converting input data into laser pulses for matrix calculation.

In practice

Topics

Best for: CTO, VP of Engineering/Data, Director of AI/ML, AI Hardware Engineer, AI Scientist, AI Architect

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Editorial summary, takeaway, and curation by AIssential. Original article published by Bug.