Pavona Launches Open-Hardware Ecosystem for Secure Chips

2026-05-25 · Source: IEEE Spectrum · Field: Technology & Digital — Cybersecurity & Data Privacy, Internet of Things (IoT) & Connected Devices, Cloud Computing & IT Infrastructure · Depth: Intermediate, medium

Summary

GlobalPlatform, a global security standards consortium, has launched Pavona, an open-hardware ecosystem aimed at accelerating the adoption of modular, standardized, and trusted open hardware across diverse applications, from IoT devices to data centers. Led by zeroRISC CEO Dominic Rizzo, Pavona provides a starting kit of hardware modules, reference designs, and software tools for integration. Unlike open-source software, hardware faces manufacturing costs and closed-source fabrication layers. Pavona addresses this by focusing on open-source layers like design verification and firmware, making components interoperable with computing cores like ARM and RISC-V. Its initial offerings include OpenTitan components, a hardware root-of-trust chip, and extensions for post-quantum cryptography. Adoption is driven by the AI boom, the 2030 post-quantum security transition, and the European Cyber Resilience Act.

Key takeaway

For AI Hardware Engineers and AI Architects evaluating secure chip designs, Pavona offers a critical pathway to integrate trusted, open-source hardware. You should explore Pavona's OpenTitan-based components, especially for post-quantum cryptography, to meet upcoming regulatory requirements like the European Cyber Resilience Act by 2030. Adopting these modular designs can streamline compliance, enhance security verification, and potentially reduce development costs for non-differentiating hardware functions.

Key insights

Pavona establishes an open-hardware ecosystem to standardize and modularize secure chip designs, fostering broader adoption and collaboration.

Principles

• Open-source hardware benefits from modularity and standardized interfaces.
• Transparent governance increases trust and adoption in open-source projects.
• Security hardware gains trustworthiness through open inspection and community stress-testing.

Method

Pavona provides a starting kit of hardware modules, reference designs, and an architectural composition engine to integrate open hardware with existing computing cores (ARM, RISC-V) without changing software stacks.

In practice

• Integrate OpenTitan-based hardware root-of-trust for enhanced chip security.
• Utilize Pavona's post-quantum cryptography extensions to meet future regulatory demands.
• Adopt modular open-hardware components for IoT devices or data center systems-on-a-chip.

Topics

• Open-Hardware Ecosystems
• Secure Chips
• OpenTitan
• Post-Quantum Cryptography
• Hardware Root-of-Trust
• Cyber Resilience Act

Best for: CTO, VP of Engineering/Data, AI Hardware Engineer, AI Security Engineer, AI Architect

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Editorial summary, takeaway, and curation by AIssential. Original article published by IEEE Spectrum.