QuickReduce INT3 Quantization and Benchmarking on MI355

· Source: AMD ROCm Blogs · Field: Technology & Digital — Artificial Intelligence & Machine Learning, Software Development & Engineering · Depth: Advanced, long

Summary

AMD's latest blog post details the implementation and benchmarking of QuickReduce INT3 quantization on the MI355 platform, building on previous work with INT4 and FP4. QuickReduce, a high-performance all-reduce library for AMD ROCm, supports inline compression, achieving up to 2.25x speedup over RCCL on MI300X configurations. The new INT3 mode represents values in 3 bits, reducing the transmitted tile from 1152 bytes (INT4) to 896 bytes, a 22% reduction. Kernel tests on a single-node MI355 server (8x AMD Instinct MI355X GPUs) show INT3 reaching approximately 5x speedup over RCCL at TP=2 for 1 GB messages, outperforming INT4 for messages above ~4 MB. End-to-end evaluations with vLLM on five LLMs (Qwen3-32B, Qwen2.5-72B-Instruct, DeepSeek-V4-Flash, MiniMax-M2.5, Qwen3-235B-A22B) at TP=2 demonstrate INT3 reducing TTFT by 3.6% and TPOT by 3.7% on average, improving throughput by 3.7% compared to INT4. Accuracy is well-preserved across MoE models and strong dense models, though Qwen3-32B showed a notable drop.

Key takeaway

For AI Engineers optimizing LLM inference on AMD Instinct MI355, consider implementing QuickReduce INT3 quantization. You can achieve up to 3.7% higher throughput and 5x speedup over RCCL at TP=2 for large messages, especially with MoE or strong baseline models. Be mindful of potential accuracy drops on models with weaker inherent capabilities, like Qwen3-32B, and restrict INT3 usage to TP=2 for best results.

Key insights

QuickReduce INT3 quantization on MI355 significantly boosts LLM inference throughput with minimal accuracy loss for robust models.

Principles

Method

QuickReduce INT3 uses block-level FP16 scale + symmetric quantization, splitting 3-bit values into low 2 bits ("q2w") and high 1 bit ("q1w") for packing.

In practice

Topics

Code references

Best for: MLOps Engineer, NLP Engineer, AI Scientist, Machine Learning Engineer, AI Engineer, AI Architect

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Editorial summary, takeaway, and curation by AIssential. Original article published by AMD ROCm Blogs.